The Design and Verification Conference (DVCon) is the premier conference for the application of languages, tools, and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, systems designers, software developers, and IP integrators the latest methodologies, techniques, applications, and demonstrations on the practical use of EDA and IP languages and standards used in electronic design.
Due to Covid-19 and travel restrictions, this year’s DVCon Europe will hold a virtual conference and as a participant, Optima will be conducting life, virtual demos. You can join us at our virtual exhibition room/booth.
TUTORIAL: Meeting ISO 26262 Functional Safety Targets Through Static and Dynamic Fault Analysis
In addition, Optima will be organizing a tutorial demo on meeting Functional Safety through static and dynamic fault analysis.
Optima’s Functional Safety Solutions:
The Optima Safety Platform includes a set of solutions, or “apps”, built on top of the company’s FIE technology that automates key ISO 26262 verification requirements. The platform targets Hard and Soft Error analysis, essential in certifying the safe operation of automotive semiconductor devices to the ISO 26262 Functional Safety standard.
- Optima-SA™: Static analysis is an automated tool that provides early identification of Functional Safety implementation flaws and provides fault-mode sizing for the FMEDA process, debug of Functional Safety problems and others.
- Optima-HE™: Hard-error analysis is accelerated over 1,000X than existing solutions to measure diagnostic coverage, then automatically improve it using Optima’s Coverage Maximizer™ technology.
- Optima-SE™: Soft-error analysis may now be completed in a reasonable time, allowing reducing the FIT rate from transient-faults to close to zero with minimal silicon cost.
DVCon Europe exhibition is open on October 27-28.
Virtual conference, Munich, Germany