Optima-HE™: Optima’s Hard Error Analysis Solution
Optima-HE™ has the following specifications:
- Ultra-fast fault analysis, reducing months of simulation to days
- CoverageMaximizer technology to detect and correct coverage holes
- Reduced resource, time-to-market, and effort with increase ASIL rating
Hard errors, or permanent faults, in an automotive device are states that become stuck at 1 or stuck at 0. These are usually created by a damaged transistor that can easily occur in a hot, vibrating, high-pressure environment such as a car.
These faults need to be detected within 0.25mS – 100mS of their occurrence, depending on their criticality and the device timing budget. This requires the entire device to be guarded using robust Safety Mechanisms, which are running continuously. In an ASIL-D device, greater than 99% of possible faults needed to be guarded by Safety Mechanisms. Optima-HE™ provides a significantly enhanced and complete solution for Hard Error fault verification and analysis.
Various Safety Mechanisms are leveraged to eliminate the effect of these hard errors. These might include BIST techniques, Lock Step operation for processors, a Software Test Library (STL), Error Correcting Codes, and many others.
To ensure that full and complete coverage of all possible faults in the design, extensive fault simulation must be performed. A simulation with a comprehensive set of test vectors is run on a clean design, and then on the same design with a fault injected on every node. Faults are classified based on their ability to propagate to a Safety Mechanism, and then by their elimination by the Safety Mechanism. This simulation must be performed at the gate level on the final device code prior to fabrication.
The traditional fault simulation process often requires months of execution time, even with extensive fault collapsing and pruning applied. Optima’s FIE™ fault simulation technology reduces the same execution time to hours, dramatically reducing execution time to alter the entire dynamics of this verification process.
The fault analysis process is only as good as the tests that are applied to the simulation. A high coverage of the design is therefore absolutely critical, and this can be hard to achieve for some of these complex blocks. Optima-HE™ includes Optima’s CoverageMaximizer™ technology, a powerful mechanism that allows for specific, uncovered nodes to be listed. This automated solution enables full coverage of blocks to be achieved easily and quickly.
Optima-HE™ Fault Analysis Display
Optima-HE™ is able to produce a full set of results, classifying faults as safe or unsafe, and further decomposing these into detected and residual faults. It also calculates the single point fault metric and provides an overall measure of coverage. The CoverageMaximizer detects coverage issues and provides automated methods to eliminate those issues.
Optima-HE™ together with other products from Optima Safety and Security Platform (OSSP) has received TUV Nord Certification for ISO 26262 ASIL-D Functional Safety Verification.