DVCon Europe 2020
Optima to Participate at DVCon Europe 2020
The Design and Verification Conference (DVCon) is the premier conference for the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe 2020 brings chip architects, systems designers, software developers, and IP integrators the latest methodologies, techniques, applications, and demonstrations on the practical use of EDA and IP languages and standards used in electronic design.
Due to Covid-19 and travel restrictions, this year’s DVCon Europe will hold a virtual conference. Optima will be conducting life, virtual demos. Moreover, Optima has prepared a tutorial on “Meeting ISO 26262 Functional Safety Targets Through Static and Dynamic Fault Analysis”.
Meeting ISO 26262 Functional Safety Targets Through Static and Dynamic Fault Analysis.
Meeting today’s Functional Safety Targets is posing new challenges for design teams working on automotive and other safety-critical chips at all, ASIL-A to -D, risk levels.
Even the parts of the design with the lowest ASIL A and B safety goals need some level of analysis, such as sizing different failure modes and making sure the implemented safety mechanisms at least has reasonable coverage potential. For the most safety-conscious ASIL-D designs, permanent fault requirements are very stringent, and transient fault analysis must also be considered.
Eliminating transient faults can require additional hardware, in the form of hardened flip flops, which increase power consumption and silicon area especially when applied across the device. With accelerated fault analysis and the judicious use of statistical and dynamic methods, it is now possible to carefully select the appropriate flips flops for hardening to achieve ASIL-D metrics while minimizing the impact on silicon real estate and power consumption. This can make a dramatic difference to the overall specifications for the final device.
This tutorial will first guide attendees through the use of high-performance static fault analysis and characterization methods for all ASIL levels. It will then turn its attention to transient fault inspection and demonstrate exactly the analysis required to produce this minimal set of hardened flips flops. Attendees will be provided a full overview of the use of these techniques that can potentially save weeks in their next ISO 26262 or other safety-critical design.
Watch other tutorials and workshops by Optima HERE.