While we have not announced publicly our ISO-26262 solutions, we are discussing it with select customers.
Feel free to contact us to obtain more details.
Here are some hints.
Performing exhaustive fault-simulation (soft-error and hard-error), on your chip for design while ensuring it meets the ISO-26262 requirements, followed by certification, can be an extensive computational task, measured sometimes in hundreds of years, performed usually in months, effecting schedules and time-to-market.
Most engineers call it “the campaign”.
Our customers will call it “a task”.
Our ISO-26262 design tools, takes care of all your design-to-ISO-26262 needs to design your chip to not only be compliant, but also to improve your coverage and FIT rate to obtain higher ASIL certification level.
Imagine on the same design and by using our tools, you can improve your ASIL level.
Our certification tool takes care, automates and expedites almost all of your ISO-26262 certification needs and provides you with a complete solution.
All the tools above are based on the FIE (Fault Injection Engine) Technology, that simply performs soft-error and hard-errors simulations, but does it at 5 orders of magnitudes faster.
The speed up factor vs. your existing simulation-based solutions can range between 20,000 and 100,000. Yes, this is a hundred thousand times speedup.
Fault Simulation should be a task, not a campaign.
Our solutions will allow you to:
1- Increase you coverage
2- Increase your confidence in the measured coverage
3- Raise your ASIL level without any change to the design
4- Speedup your design cycle
5- Speedup your certification cycles
6- Reduce time-to-market
7- And we have not talked about silicon and power reduction yet!
Contact us for more details.